Overview
virtualEcu enables scalable, high-fidelity ECU simulation in the cloud, enabling fast iterations and continuous validation across MIL, SIL, HIL, and VIL stages.
1. Product Modules & Core Functions
virtual ECU simulation Overview
Virtual ECU Simulation L3 Selection and Key Modules Identification
| Module | What it does | Key Artifacts |
|---|---|---|
|
Swc Installer (Application Packager) |
One-click install of application SWCs into a host-compiled, cycle-accurate MCU+BSW simulator that auto-generates RTE code and interface/task-mapping ARXML from user-supplied network and memory definition files. | ARXML, runnable templates, RTE glue code |
|
vECU Builder (Ecu Simulation) |
Host-compiled, cycle-approximate executable mimicking real MCU+BSW. Loads network interfaces and memory maps from external description files so one binary can emulate multiple ECU variants for rapid SIL testing. | vECU image, REST/GRPC interface, data instrumentation |
|
Test Engine (Optional) |
Python-first automation framework that re-uses the same BSW & RTE as HiL and orchestrates cross-SiL/HiL test flows. | pytest scripts, CANoe restbus configs |
2. Usage Scenarios & Pain Points
Scenario
Integrate 50+ SWCs before hardware exists.
Pain Point Today
Waiting for hardware; late interface mismatches cause rework.
vECU Value
Parallel integration on day one; 1 dev + 1 virtual integrator.
Scenario
DevOps optimizes local builds but ignores end-to-end quality.
Pain Point Today
Quality drops; cross-team firefighting and overtime.
vECU Value
Same RTE & BSW from SiL→HiL→Vehicle; zero re-porting.
Scenario
HiL benches and vehicles are overloaded mid‑project.
Pain Point Today
Queues for debugging, power mgmt, performance tests.
vECU Value
Move HMI & communication tests to SiL; free HiL for real‑time/HW performance.
Scenario
OEM owns apps; Tier‑1 supplies HW platform only.
Pain Point Today
No virtual offering at Tier‑1; OEM forced into long HW cycles.
vECU Value
Tier‑1 ships vECU day‑0 to keep OEM in a fast agile loop.
3. Technical Highlights
| Dimension | Advantage | Evidence |
|---|---|---|
| Speed | Host‑compiled binaries start in < 3 s; 10× faster iteration than dSPACE prototype | Level‑3 MCU + AUTOSAR CP simulation chosen after cost‑benefit study |
| Fidelity | Same BSW, RTE, and bus‑simulation stack in SiL & HiL keeps behavioural delta minimal; defects caught in SiL rarely escape to HiL | E2E bus‑interface tests pass across SiL & HiL with identical artifacts |
| Scalability | Cloud container farm enables > 50 engineers to integrate in parallel | Used by leading NEV OEM for cockpit‑fusion platform |
| Openness | ArcCore open‑source BSW + Python API; no vendor lock‑in | Supports plugins and custom service layers for SDV |
4. Extra Benefits
- Zero‑Hardware Start: Start integration the day the spec is frozen.
- Shift‑Left UX & Functionality: Validate HMI & communication in SiL 3–6 months earlier.
- Cost Sharing: Common framework across brands slashes non‑differentiating costs.
- Cultural Fix: Shift focus from local efficiency to global quality.